1. Field of the Invention
This invention relates to a non-volatile memory device, in which a resistance-change element is used as an electrically rewritable memory cell to store a resistance value as data.
2. Description of the Related Art
To achieve a large capacity of a non-volatile memory device, it is noted such a method as to three-dimensionally stack memory cells for storing resistance values thereof as data. There have been proposed, for example, a phase change memory (PC RAM) and a resistance change memory (ReRAM) as typical examples. Used as a resistance change element (i.e., variable resistance element) in the former is a calcogenide element; and used as the resistance change element in the latter is a transition metal oxide layer.
To fabricate a highly integrated memory device with a low cost, it is desired to dispose memory cells only at the cross points of column select lines and row select lines arranged to cress each other. Further, to achieve high integration and capacity-increase of the memory, it is desired to three-dimensionally stack the memory cells. There have already been proposed three dimensional cell arrays, for example, in JP2005-522045A and JP2006-514393A.
To make the memory cell's operation control easy, it is required of the variable resistance element to be coupled to a diode in series without transistors. In this case, it is utilized such a unipolar operation that unipolar pulses with different time-widths and different voltages (currents) are used in the set and reset operations.
On the other hand, in a bipolar type of ReRAM, voltages (currents) with different directions are used in the set and reset operations (for example, see JP2009-217908A).
In general, in a non-volatile semiconductor memory device, data write (or program) is performed page by page, and checking (or verify-reading, or verifying simply) operation is performed for checking the program data with the practically programmed data within the program sequence. Further, in accordance with that the non-volatile memory device is highly integrated and a memory controller for the memory device is made to be highly functional, it is used such a technology that if a fail bit number is equal to or smaller than an error-correctable bit number in a page, the fail bit number is permitted, while maintaining the program performance.
That is, it is known that that a fail bit count circuit is installed in a non-volatile memory device, and a comparing circuit is disposed therein for comparing the fail bit number with a predetermined permissible fail bit number. For example, refer to JP2008-4178A.
However, in the ReRAM formed of resistance change elements, as different from the conventional non-volatile memory device, in which the cell threshold defined by the charge amount stored in the floating gate is used as data, for example, a NAND-type flash memory, it is possible to set a program unit and an erase unit to be identical with each other. Additionally, as different from the NAND-type flash memory, it is unnecessary for the ReRAM to erase a block including a noticing page prior to the data program, and direct rewrite may also be performed.
Due to the difference of the program methods, in the non-volatile memory device with resistance change elements arranged therein, it is impossible to use the fail bit count scheme used in the NAND-type flash memory as it is.